Sparse - tree architecture enables low carry - merge fan - outs and inter - stage wiring complexity . single - rail and semi - dynamic circuit improves operation speed . simulation results show that the proposed adder can operate at 485ps with power of 25 . 6mw in 0 . 18 - mu m cmos process 具有代表性的并行前缀进位结构有kogge - stone树brent - kung树han - carlson树和knowles树等,一些高性能的加法器也由此被设计出来。